Buried-Pt gate InP/In0.52Al0.48As/In0.7Ga0.3As pseudomorphic HEMTs
Identifieur interne : 003372 ( Main/Repository ); précédent : 003371; suivant : 003373Buried-Pt gate InP/In0.52Al0.48As/In0.7Ga0.3As pseudomorphic HEMTs
Auteurs : RBID : Pascal:11-0297604Descripteurs français
- Pascal (Inist)
- Transistor pseudomorphique, Transistor mobilité électron élevée, Métallisation, Recuit, Evaluation performance, Transconductance, Barrière Schottky, Hauteur barrière, Gain courant, Fréquence coupure, Fréquence oscillation, Mobilité électron, Contact électrique, Phosphure d'indium, Composé binaire, Multicouche, Couche épaisse, Fabrication microélectronique, InP.
English descriptors
- KwdEn :
- Annealing, Barrier height, Binary compound, Current gain, Cut off frequency, Electric contact, Electron mobility, High electron mobility transistor, Indium phosphide, Metallizing, Microelectronic fabrication, Multiple layer, Oscillation frequency, Performance evaluation, Pseudomorphic transistor, Schottky barrier, Thick film, Transconductance.
Abstract
InP-based high electron mobility transistors (HEMTs) were fabricated by depositing Pt-based multilayer metallization on top of a 6-nm-thick InP etch stop layer and then applying a post-annealing process. The performances of the fabricated 55-nm-gate HEMTs before and after the post-annealing were characterized and were compared to investigate the effect of the penetration of Pt through the very thin InP etch stop layer. After annealing at 250 °C for 5 min, the extrinsic transconductance (Gm) was increased from 1.05 to 1.17 S/mm and Schottky barrier height was increased from 0.63 to 0.66 eV. The unity current gain cutoff frequency (fT) was increased from 351 to 408 GHz, and the maximum oscillation frequency (fmax) was increased from 225 to 260 GHz. These performance improvements can be attributed to penetration of the Pt through the 6-nm thick InP layer, and making contact on the InAlAs layer. The STEM image of the annealed device clearly shows that the Pt atoms contacted the InAlAs layer after penetrating through the InP layer.
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<record><TEI><teiHeader><fileDesc><titleStmt><title xml:lang="en" level="a">Buried-Pt gate InP/In<sub>0.52</sub>Al<sub>0.48</sub>As/In<sub>0.7</sub>Ga<sub>0.3</sub>As pseudomorphic HEMTs</title><author><name>SEUNG HEON SHIN</name><affiliation wicri:level="1"><inist:fA14 i1="01"><s1>School of Information and Communications and The WCU Department of Nonobio Materials and Electronics, Gwangju Institute of Science and Technology (GIST), 1 Oryong-dong Buk-gu</s1><s2>Gwangju 500-712</s2><s3>KOR</s3><sZ>1 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ></inist:fA14><country>Corée du Sud</country><wicri:noRegion>Gwangju 500-712</wicri:noRegion></affiliation></author><author><name sortKey="Kim, Tae Woo" uniqKey="Kim T">Tae-Woo Kim</name><affiliation wicri:level="4"><inist:fA14 i1="02"><s1>Microsystems Technology Laboratory, Massachusetts Institute of Technology</s1><s2>Cambridge, MA 02139</s2><s3>USA</s3><sZ>2 aut.</sZ></inist:fA14><country>États-Unis</country><placeName><settlement type="city">Cambridge (Massachusetts)</settlement><region type="state">Massachusetts</region></placeName><orgName type="university">Massachusetts Institute of Technology</orgName></affiliation></author><author><name sortKey="Song, Jong In" uniqKey="Song J">Jong-In Song</name><affiliation wicri:level="1"><inist:fA14 i1="01"><s1>School of Information and Communications and The WCU Department of Nonobio Materials and Electronics, Gwangju Institute of Science and Technology (GIST), 1 Oryong-dong Buk-gu</s1><s2>Gwangju 500-712</s2><s3>KOR</s3><sZ>1 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ></inist:fA14><country>Corée du Sud</country><wicri:noRegion>Gwangju 500-712</wicri:noRegion></affiliation></author><author><name sortKey="Jang, Jae Hyung" uniqKey="Jang J">Jae-Hyung Jang</name><affiliation wicri:level="1"><inist:fA14 i1="01"><s1>School of Information and Communications and The WCU Department of Nonobio Materials and Electronics, Gwangju Institute of Science and Technology (GIST), 1 Oryong-dong Buk-gu</s1><s2>Gwangju 500-712</s2><s3>KOR</s3><sZ>1 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ></inist:fA14><country>Corée du Sud</country><wicri:noRegion>Gwangju 500-712</wicri:noRegion></affiliation></author></titleStmt><publicationStmt><idno type="inist">11-0297604</idno><date when="2011">2011</date><idno type="stanalyst">PASCAL 11-0297604 INIST</idno><idno type="RBID">Pascal:11-0297604</idno><idno type="wicri:Area/Main/Corpus">002F60</idno><idno type="wicri:Area/Main/Repository">003372</idno></publicationStmt><seriesStmt><idno type="ISSN">0038-1101</idno><title level="j" type="abbreviated">Solid-state electron.</title><title level="j" type="main">Solid-state electronics</title></seriesStmt></fileDesc><profileDesc><textClass><keywords scheme="KwdEn" xml:lang="en"><term>Annealing</term><term>Barrier height</term><term>Binary compound</term><term>Current gain</term><term>Cut off frequency</term><term>Electric contact</term><term>Electron mobility</term><term>High electron mobility transistor</term><term>Indium phosphide</term><term>Metallizing</term><term>Microelectronic fabrication</term><term>Multiple layer</term><term>Oscillation frequency</term><term>Performance evaluation</term><term>Pseudomorphic transistor</term><term>Schottky barrier</term><term>Thick film</term><term>Transconductance</term></keywords><keywords scheme="Pascal" xml:lang="fr"><term>Transistor pseudomorphique</term><term>Transistor mobilité électron élevée</term><term>Métallisation</term><term>Recuit</term><term>Evaluation performance</term><term>Transconductance</term><term>Barrière Schottky</term><term>Hauteur barrière</term><term>Gain courant</term><term>Fréquence coupure</term><term>Fréquence oscillation</term><term>Mobilité électron</term><term>Contact électrique</term><term>Phosphure d'indium</term><term>Composé binaire</term><term>Multicouche</term><term>Couche épaisse</term><term>Fabrication microélectronique</term><term>InP</term></keywords></textClass></profileDesc></teiHeader><front><div type="abstract" xml:lang="en">InP-based high electron mobility transistors (HEMTs) were fabricated by depositing Pt-based multilayer metallization on top of a 6-nm-thick InP etch stop layer and then applying a post-annealing process. The performances of the fabricated 55-nm-gate HEMTs before and after the post-annealing were characterized and were compared to investigate the effect of the penetration of Pt through the very thin InP etch stop layer. After annealing at 250 °C for 5 min, the extrinsic transconductance (G<sub>m</sub>) was increased from 1.05 to 1.17 S/mm and Schottky barrier height was increased from 0.63 to 0.66 eV. The unity current gain cutoff frequency (f<sub>T</sub>) was increased from 351 to 408 GHz, and the maximum oscillation frequency (f<sub>max</sub>) was increased from 225 to 260 GHz. These performance improvements can be attributed to penetration of the Pt through the 6-nm thick InP layer, and making contact on the InAlAs layer. The STEM image of the annealed device clearly shows that the Pt atoms contacted the InAlAs layer after penetrating through the InP layer.</div></front></TEI><inist><standard h6="B"><pA><fA01 i1="01" i2="1"><s0>0038-1101</s0></fA01><fA03 i2="1"><s0>Solid-state electron.</s0></fA03><fA05><s2>62</s2></fA05><fA06><s2>1</s2></fA06><fA08 i1="01" i2="1" l="ENG"><s1>Buried-Pt gate InP/In<sub>0.52</sub>Al<sub>0.48</sub>As/In<sub>0.7</sub>Ga<sub>0.3</sub>As pseudomorphic HEMTs</s1></fA08><fA11 i1="01" i2="1"><s1>SEUNG HEON SHIN</s1></fA11><fA11 i1="02" i2="1"><s1>KIM (Tae-Woo)</s1></fA11><fA11 i1="03" i2="1"><s1>SONG (Jong-In)</s1></fA11><fA11 i1="04" i2="1"><s1>JANG (Jae-Hyung)</s1></fA11><fA14 i1="01"><s1>School of Information and Communications and The WCU Department of Nonobio Materials and Electronics, Gwangju Institute of Science and Technology (GIST), 1 Oryong-dong Buk-gu</s1><s2>Gwangju 500-712</s2><s3>KOR</s3><sZ>1 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ></fA14><fA14 i1="02"><s1>Microsystems Technology Laboratory, Massachusetts Institute of Technology</s1><s2>Cambridge, MA 02139</s2><s3>USA</s3><sZ>2 aut.</sZ></fA14><fA20><s1>106-109</s1></fA20><fA21><s1>2011</s1></fA21><fA23 i1="01"><s0>ENG</s0></fA23><fA43 i1="01"><s1>INIST</s1><s2>2888</s2><s5>354000189906560180</s5></fA43><fA44><s0>0000</s0><s1>© 2011 INIST-CNRS. All rights reserved.</s1></fA44><fA45><s0>25 ref.</s0></fA45><fA47 i1="01" i2="1"><s0>11-0297604</s0></fA47><fA60><s1>P</s1></fA60><fA61><s0>A</s0></fA61><fA64 i1="01" i2="1"><s0>Solid-state electronics</s0></fA64><fA66 i1="01"><s0>GBR</s0></fA66><fC01 i1="01" l="ENG"><s0>InP-based high electron mobility transistors (HEMTs) were fabricated by depositing Pt-based multilayer metallization on top of a 6-nm-thick InP etch stop layer and then applying a post-annealing process. The performances of the fabricated 55-nm-gate HEMTs before and after the post-annealing were characterized and were compared to investigate the effect of the penetration of Pt through the very thin InP etch stop layer. After annealing at 250 °C for 5 min, the extrinsic transconductance (G<sub>m</sub>) was increased from 1.05 to 1.17 S/mm and Schottky barrier height was increased from 0.63 to 0.66 eV. The unity current gain cutoff frequency (f<sub>T</sub>) was increased from 351 to 408 GHz, and the maximum oscillation frequency (f<sub>max</sub>) was increased from 225 to 260 GHz. These performance improvements can be attributed to penetration of the Pt through the 6-nm thick InP layer, and making contact on the InAlAs layer. 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